M. Tech. - VLSI Design

About the Course	The M.Tech in VLSI Design at JaganNath University, Jaipur is a specialized postgraduate program designed to develop advanced skills in semiconductor design, chip architecture, and nanoelectronics. The program provides a blend of theoretical foundation and industry-driven practical training to prepare students for high-demand roles in the semiconductor and electronics industry.
Key USPs	Curriculum aligned with industry needs covering Digital IC Design, Analog & Mixed Signal VLSI, SoC Design, and Nanoelectronics. Training on industry-standard EDA tools such as Cadence, Synopsys, Xilinx Vivado, Mentor Graphics, and MATLAB. Emphasis on ASIC & FPGA design flow, low power VLSI, and CMOS fabrication technologies. Collaboration with semiconductor companies for internships, workshops, and live projects. Access to state-of-the-art VLSI and Embedded Systems Labs with high-performance computing infrastructure.
Eligibility and Selection Process	Eligibility Criteria B.Tech/B.E. in ECE/EEE/Instrumentation/CS or equivalent with minimum 55% marks. Selection Procedure Based on merit and/or GATE score followed by a personal interview. Course Duration Total duration : 2 years (4 semesters).
Scholarships	Merit-based and need-based scholarships available. GATE-qualified students may be eligible for special academic incentives or fellowships as per university policy.
Specialization Overview	The program offers in-depth knowledge of IC design, device modeling, physical design automation, and testing & verification. It equips students to innovate in areas like AI-integrated hardware, low power chips, and smart sensor systems.
Key Highlights	VLSI design labs equipped with FPGA boards, Logic Analyzers, and Testing Equipment. Projects in RTL Design, Layout Design, and HDL Simulation (using Verilog, VHDL). Training in EDA Tools, simulation, synthesis, place & route, and verification. Opportunities for IEEE conference publications, patents, and funded research.
Infrastructure Details	Dedicated VLSI Research Lab with high-end workstations and licensed tools. Access to a digital library with journals like IEEE Xplore, Springer, and ScienceDirect. Facilities for remote design simulation and hardware testing.
Faculty Details	A team of experienced Ph.D. faculty with specializations in semiconductor devices, digital/analog VLSI, EDA tools, and chip-level optimization. Faculty guide students in academic research, industrial projects, and paper publications.
Internship Information	Structure: Internship or dissertation project during the final semester. Duration: 8–12 weeks Focus Areas: RTL/FPGA Design, Chip Testing, Physical Design, and IC Fabrication.
Placement Details	Average CTC Offered: ₹5–7 LPA (approx.) Top Recruiters: Intel, AMD, Qualcomm, Cadence, Synopsis, Wipro VLSI, Sankalp Semiconductor, Tata Elxsi.
Additional Information	Industry Exposure and Practical Experience: Guest lectures and bootcamps by experts from ISRO, DRDO, STMicroelectronics, and Intel. Participation in VLSI Design Conferences, Hackathons, and Design Challenges. Live industry projects and mentorship opportunities from semiconductor R&D labs.